121 lines
5.2 KiB
Diff
121 lines
5.2 KiB
Diff
From 8abe9a4e18257222f84a2d3e275a5b5db775a297 Mon Sep 17 00:00:00 2001
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Message-Id: <8abe9a4e18257222f84a2d3e275a5b5db775a297.1507237259.git.Jim.Somerville@windriver.com>
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In-Reply-To: <2a9fb6a58e40e8604d97223603111e869bb774b1.1507237258.git.Jim.Somerville@windriver.com>
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References: <2a9fb6a58e40e8604d97223603111e869bb774b1.1507237258.git.Jim.Somerville@windriver.com>
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From: Matt Peters <matt.peters@windriver.com>
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Date: Mon, 30 May 2016 10:51:02 -0400
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Subject: [PATCH 08/24] intel-iommu: allow ignoring Ethernet device RMRR with
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IOMMU passthrough
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Some BIOS's are reporting DMAR RMRR entries for Ethernet devices
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which is causing problems when PCI passthrough is enabled. These
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devices should be able to use the static identity map since the
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host should not be enforcing specific address ranges when IOMMU
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passthrough is enabled.
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Originally-by: Matt Peters <matt.peters@windriver.com>
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[PG: Added bootarg wrapper and documentation entries.]
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Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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Signed-off-by: Nam Ninh <nam.ninh@windriver.com>
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Signed-off-by: Nam Ninh <nam.ninh@windriver.com>
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Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com>
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---
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Documentation/Intel-IOMMU.txt | 18 ++++++++++++++++++
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Documentation/kernel-parameters.txt | 5 +++++
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drivers/iommu/intel-iommu.c | 19 +++++++++++++++++++
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3 files changed, 42 insertions(+)
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diff --git a/Documentation/Intel-IOMMU.txt b/Documentation/Intel-IOMMU.txt
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index cf9431d..1dcc349 100644
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--- a/Documentation/Intel-IOMMU.txt
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+++ b/Documentation/Intel-IOMMU.txt
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@@ -32,6 +32,24 @@ regions will fail. Hence BIOS uses RMRR to specify these regions along with
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devices that need to access these regions. OS is expected to setup
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unity mappings for these regions for these devices to access these regions.
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+RMRR for other devices?
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+-----------------------
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+
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+There are reports of BIOS out there that indicate RMRR regions for things
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+like ethernet devices. As per mainline commit c875d2c1b8083 ("iommu/vt-d:
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+ Exclude devices using RMRRs from IOMMU API domains") such a device is
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+"fundamentally incompatible" with the IOMMU API and "we must prevent such
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+devices from being used by the IOMMU API." However, in the event that
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+the RMRR indicated by the BIOS is assumed to be just a reporting error,
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+there is an additional iommu boot arg that can be used to ignore RMRR
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+settings for ethernet, i.e. "intel_iommu=on,eth_no_rmrr iommu=pt".
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+Note that iommu=pt is required in order to eth_no_rmrr to have effect.
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+
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+If you use this setting, you should consult with your hardware vendor to
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+confirm that it is just a reporting error, and that it truly is not
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+actively using any DMA to/from RMRR, as otherwise system instability
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+may result.
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+
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How is IOVA generated?
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---------------------
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diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
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index 9c29169..e22bb2c 100644
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--- a/Documentation/kernel-parameters.txt
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+++ b/Documentation/kernel-parameters.txt
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@@ -1264,6 +1264,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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than 32-bit addressing. The default is to look
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for translation below 32-bit and if not available
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then look in the higher range.
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+ eth_no_rmrr [Default Off]
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+ With this option provided, the kernel will ignore
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+ any specified RMRR regions specified by the BIOS
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+ for PCI ethernet devices. Confirm with your hardware
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+ vendor the RMRR regions are indeed invalid first.
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strict [Default Off]
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With this option on every unmap_single operation will
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result in a hardware IOTLB flush operation as opposed
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diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
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index 171a8b2..e763e78 100644
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--- a/drivers/iommu/intel-iommu.c
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+++ b/drivers/iommu/intel-iommu.c
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@@ -496,6 +496,7 @@ static int dmar_forcedac;
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static int intel_iommu_strict;
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static int intel_iommu_superpage = 1;
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static int intel_iommu_ecs = 1;
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+static int intel_iommu_ethrmrr = 1;
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/* We only actually use ECS when PASID support (on the new bit 40)
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* is also advertised. Some early implementations — the ones with
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@@ -555,6 +556,15 @@ static int __init intel_iommu_setup(char *str)
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} else if (!strncmp(str, "forcedac", 8)) {
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pr_info("Forcing DAC for PCI devices\n");
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dmar_forcedac = 1;
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+ } else if (!strncmp(str, "eth_no_rmrr", 11)) {
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+ if (!iommu_pass_through) {
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+ printk(KERN_WARNING
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+ "Intel-IOMMU: error - eth_no_rmrr requires iommu=pt\n");
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+ } else {
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+ printk(KERN_INFO
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+ "Intel-IOMMU: ignoring ethernet RMRR values\n");
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+ intel_iommu_ethrmrr = 0;
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+ }
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} else if (!strncmp(str, "strict", 6)) {
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pr_info("Disable batched IOTLB flush\n");
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intel_iommu_strict = 1;
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@@ -2674,6 +2684,15 @@ static bool device_is_rmrr_locked(struct device *dev)
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if (IS_USB_DEVICE(pdev) || IS_GFX_DEVICE(pdev))
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return false;
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+ /* As a temporary workaround for issues seen on ProLiant DL380p,
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+ * allow the operator to ignore the RMRR settings for ethernet
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+ * devices. Ideally the end user should contact their vendor
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+ * regarding why there are RMRR, as per mainline c875d2c1b8083
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+ * ("iommu/vt-d: Exclude devices using RMRRs from IOMMU API domains")
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+ * it seems that these make no sense at all.
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+ */
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+ if ((pdev->class >> 8) == PCI_CLASS_NETWORK_ETHERNET && !intel_iommu_ethrmrr)
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+ return false;
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}
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return true;
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--
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1.8.3.1
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