Files
powertrain-build/tests/powertrain_build/test_rte_dummy.py
Henrik Wahlqvist 97d0b8347a Make rte_dummy generate a dummy mem map header
Change-Id: Ief530da762c83ee6ca2cc80b4e07086611f0400a
2025-09-04 12:03:56 +00:00

175 lines
6.9 KiB
Python

# Copyright 2024 Volvo Car Corporation
# Licensed under Apache 2.0.
"""Unit test script for powertrain_build.rte_dummy."""
import unittest
from pathlib import Path
from unittest.mock import MagicMock, patch, mock_open
from powertrain_build.rte_dummy import RteDummy
from test_data.powertrain_build.test_rte_dummy import rte_dummy
def mock_get_memory_map_config():
"""Function to mock BuildProjConfig.get_memory_map_config."""
return {
"memMapPrefix": "TESTNAME_SC",
"includeHeaderGuards": False,
"includeMemMapForCalibration": True,
"projectDefines": {
"START": {
"code": "#define TESTNAME_SC_START_CODE",
"const": "#define TESTNAME_SC_START_CONST",
"disp": "#define TESTNAME_SC_START_DISP",
"cal": "#define TESTNAME_SC_START_CAL"
},
"STOP": {
"code": "#define TESTNAME_SC_STOP_CODE",
"const": "#define TESTNAME_SC_STOP_CONST",
"disp": "#define TESTNAME_SC_STOP_DISP",
"cal": "#define TESTNAME_SC_STOP_CAL"
}
}
}
def mock_get_composition_config(key):
"""Function to mock BuildProjConfig.get_composition_config."""
return {
"compositionName": "testName",
"softwareComponentName": "testName_SC",
}[key]
def mock_get_nvm_areas_index(memory_area):
"""Return the index of the given memory area."""
return {"NVM_LIST_8": 0, "NVM_LIST_16": 1}[memory_area]
class TestRteDummy(unittest.TestCase):
"""Class for testing powertrain_build.rte_dummy."""
def setUp(self):
"""Set-up mocks and common variables and data structures for all tests in the test case."""
self.build_cfg = MagicMock()
self.build_cfg.get_scheduler_prefix.return_value = "DUMMY_"
self.build_cfg.get_composition_config.side_effect = mock_get_composition_config
self.build_cfg.get_memory_map_config.side_effect = mock_get_memory_map_config
self.build_cfg.get_code_generation_config.return_value = False
self.build_cfg.get_nvm_defs.return_value = {"fileName": "vcc_nvm_struct"}
self.nvm_def = MagicMock()
self.nvm_def._get_nvm_areas_index.side_effect = mock_get_nvm_areas_index
self.nvm_def.struct_member_prefix = "e_"
self.nvm_def._nvm_memory_areas = ("NVM_LIST_8", "NVM_LIST_16")
self.nvm_def.nvm_definitions = [
{
"name": "NVM_LIST_8",
"allowed_datatypes": ["Bool", "UInt8", "Int8"],
"size": 2,
"instanceName": "nvm_list_8",
"default_datatype": "UInt8",
"includeStop": "",
"includeStart": "",
"persistent": False,
"signals": [
{"name": "dummy", "type": "UInt8", "x_size": 1, "y_size": 1}
]
},
{
"name": "NVM_LIST_16",
"allowed_datatypes": ["UInt16", "Int16"],
"size": 2,
"instanceName": "nvm_list_16",
"default_datatype": "UInt16",
"includeStop": "",
"includeStart": "",
"persistent": False,
"signals": [
{"name": "dummy2", "type": "UInt16", "x_size": 1, "y_size": 1}
]
}
]
self.rte_dummy = RteDummy(self.build_cfg, self.nvm_def, {})
def test_generate_rte_dummy(self):
"""Test RteDummy.generate_rte_dummy()."""
result = []
m_open = mock_open()
m_open.return_value.write = result.append
with patch.object(Path, "open", m_open, create=True):
self.rte_dummy.generate_rte_dummy()
expected = [
rte_dummy.expected_mem_map_content,
rte_dummy.expected_swc_content,
rte_dummy.expected_type_header_header,
rte_dummy.expected_typedefs,
rte_dummy.expected_nvm_header_content,
rte_dummy.expected_calibration_header_content,
rte_dummy.expected_type_header_footer,
rte_dummy.expected_source_header,
rte_dummy.expected_nvm_source_content,
rte_dummy.expected_calibration_source_content,
]
self.assertListEqual(result, expected)
def test_generate_rte_dummy_rte_structs(self):
"""Test RteDummy.generate_rte_dummy()."""
self.build_cfg.get_code_generation_config.return_value = True
self.rte_dummy = RteDummy(self.build_cfg, self.nvm_def, {})
result = []
m_open = mock_open()
m_open.return_value.write = result.append
with patch.object(Path, "open", m_open, create=True):
self.rte_dummy.generate_rte_dummy()
expected = [
rte_dummy.expected_mem_map_content,
rte_dummy.expected_swc_content,
rte_dummy.expected_rte_structs_type_header_header,
rte_dummy.expected_rte_structs_typedefs,
rte_dummy.expected_rte_structs_nvm_header_content,
rte_dummy.expected_calibration_header_content,
rte_dummy.expected_type_header_footer,
rte_dummy.expected_source_header,
rte_dummy.expected_rte_structs_nvm_source_content,
rte_dummy.expected_calibration_source_content,
]
self.assertListEqual(result, expected)
def test_generate_rte_dummy_rte_structs_and_calibration(self):
"""Test RteDummy.generate_rte_dummy()."""
self.build_cfg.get_code_generation_config.return_value = True
calibration_data = {
"class_info": {
"mVcSignalOne": {
"width": [2, 3],
"type": "UInt16",
"autosar_type": "dt_mVcSignalOne",
},
"sVcSignalTwo": {
"width": 1,
"type": "UInt16",
"autosar_type": "UInt16",
},
}
}
self.rte_dummy = RteDummy(self.build_cfg, self.nvm_def, calibration_data)
result = []
m_open = mock_open()
m_open.return_value.write = result.append
with patch.object(Path, "open", m_open, create=True):
self.rte_dummy.generate_rte_dummy()
expected = [
rte_dummy.expected_mem_map_content,
rte_dummy.expected_swc_content,
rte_dummy.expected_rte_structs_type_header_header,
rte_dummy.expected_rte_structs_and_calibration_typedefs,
rte_dummy.expected_rte_structs_nvm_header_content,
rte_dummy.expected_calibration_calibration_header_content,
rte_dummy.expected_type_header_footer,
rte_dummy.expected_source_header,
rte_dummy.expected_rte_structs_nvm_source_content,
rte_dummy.expected_calibration_calibration_source_content
]
self.assertListEqual(result, expected)