Make rte_dummy generate a dummy mem map header

Change-Id: Ief530da762c83ee6ca2cc80b4e07086611f0400a

powertrain_build/rte_dummy.py

@@ -29,6 +29,8 @@ class RteDummy(ProblemLogger):
         self.build_cfg = build_cfg
         self.nvm_def = nvm_def
         self.calibration_variables = calib_data.get("class_info", {})
+        mem_map_config = self.build_cfg.get_memory_map_config()
+        self.mem_map_header_file_name = f"{mem_map_config['memMapPrefix']}_MemMap"
         self.swc_header_file_name = f"Rte_{self.build_cfg.get_composition_config('softwareComponentName')}"
         self.type_header_file_name = "Rte_Type"
         self.source_file_name = "Rte_Dummy"
@@ -43,6 +45,15 @@ class RteDummy(ProblemLogger):
             " */\n"
         )
 
+    def _get_mem_map_header_content(self):
+        """Get content for the dummy memory map header."""
+        return (
+            f"{self._get_common_header()}"
+            f"#ifndef {self.mem_map_header_file_name.upper()}_H\n"
+            f"#define {self.mem_map_header_file_name.upper()}_H\n\n"
+            f"#endif /* {self.mem_map_header_file_name.upper()}_H */\n"
+        )
+
     def _get_swc_header_content(self):
         """Get content for the SWC RTE dummy header."""
         return (
@@ -221,9 +232,12 @@ class RteDummy(ProblemLogger):
     def generate_rte_dummy(self):
         """Generate RTE dummy files."""
         src_code_dest_dir = self.build_cfg.get_src_code_dst_dir()
+        mem_map_header_file = Path(src_code_dest_dir, self.mem_map_header_file_name + ".h")
         swc_header_file = Path(src_code_dest_dir, self.swc_header_file_name + ".h")
         type_header_file = Path(src_code_dest_dir, self.type_header_file_name + ".h")
         source_file = Path(src_code_dest_dir, self.source_file_name + ".c")
+        with mem_map_header_file.open(mode="w", encoding="utf-8") as mem_map_header_fh:
+            mem_map_header_fh.write(self._get_mem_map_header_content())
         with swc_header_file.open(mode="w", encoding="utf-8") as swc_header_fh:
             swc_header_fh.write(self._get_swc_header_content())
         with type_header_file.open(mode="w", encoding="utf-8") as type_header_fh:

test_data/powertrain_build/test_rte_dummy/rte_dummy.py

@@ -3,6 +3,17 @@
 
 """Unit test data for powertrain_build.rte_dummy."""
 
+expected_mem_map_content = (
+    "/*\n"
+    " * This file is generated by the Powertrain Build System.\n"
+    " * It defines RTE dummy types and/or functions.\n"
+    " * Do not modify this file manually.\n"
+    " */\n"
+    "#ifndef TESTNAME_SC_MEMMAP_H\n"
+    "#define TESTNAME_SC_MEMMAP_H\n\n"
+    "#endif /* TESTNAME_SC_MEMMAP_H */\n"
+)
+
 expected_swc_content = (
     "/*\n"
     " * This file is generated by the Powertrain Build System.\n"

tests/powertrain_build/test_rte_dummy.py

@@ -11,6 +11,29 @@ from powertrain_build.rte_dummy import RteDummy
 from test_data.powertrain_build.test_rte_dummy import rte_dummy
 
 
+def mock_get_memory_map_config():
+    """Function to mock BuildProjConfig.get_memory_map_config."""
+    return {
+        "memMapPrefix": "TESTNAME_SC",
+        "includeHeaderGuards": False,
+        "includeMemMapForCalibration": True,
+        "projectDefines": {
+            "START": {
+                "code": "#define TESTNAME_SC_START_CODE",
+                "const": "#define TESTNAME_SC_START_CONST",
+                "disp": "#define TESTNAME_SC_START_DISP",
+                "cal": "#define TESTNAME_SC_START_CAL"
+            },
+            "STOP": {
+                "code": "#define TESTNAME_SC_STOP_CODE",
+                "const": "#define TESTNAME_SC_STOP_CONST",
+                "disp": "#define TESTNAME_SC_STOP_DISP",
+                "cal": "#define TESTNAME_SC_STOP_CAL"
+            }
+        }
+    }
+
+
 def mock_get_composition_config(key):
     """Function to mock BuildProjConfig.get_composition_config."""
     return {
@@ -32,6 +55,7 @@ class TestRteDummy(unittest.TestCase):
         self.build_cfg = MagicMock()
         self.build_cfg.get_scheduler_prefix.return_value = "DUMMY_"
         self.build_cfg.get_composition_config.side_effect = mock_get_composition_config
+        self.build_cfg.get_memory_map_config.side_effect = mock_get_memory_map_config
         self.build_cfg.get_code_generation_config.return_value = False
         self.build_cfg.get_nvm_defs.return_value = {"fileName": "vcc_nvm_struct"}
         self.nvm_def = MagicMock()
@@ -76,6 +100,7 @@ class TestRteDummy(unittest.TestCase):
         with patch.object(Path, "open", m_open, create=True):
             self.rte_dummy.generate_rte_dummy()
         expected = [
+            rte_dummy.expected_mem_map_content,
             rte_dummy.expected_swc_content,
             rte_dummy.expected_type_header_header,
             rte_dummy.expected_typedefs,
@@ -98,6 +123,7 @@ class TestRteDummy(unittest.TestCase):
         with patch.object(Path, "open", m_open, create=True):
             self.rte_dummy.generate_rte_dummy()
         expected = [
+            rte_dummy.expected_mem_map_content,
             rte_dummy.expected_swc_content,
             rte_dummy.expected_rte_structs_type_header_header,
             rte_dummy.expected_rte_structs_typedefs,
@@ -134,6 +160,7 @@ class TestRteDummy(unittest.TestCase):
         with patch.object(Path, "open", m_open, create=True):
             self.rte_dummy.generate_rte_dummy()
         expected = [
+            rte_dummy.expected_mem_map_content,
             rte_dummy.expected_swc_content,
             rte_dummy.expected_rte_structs_type_header_header,
             rte_dummy.expected_rte_structs_and_calibration_typedefs,